To enable machine intelligence at the edge, it is important that the algorithms and systems are able to operate under power/compute constraints. Our hardware acceleration efforts aim to provide complex data analysis and understanding services at the edge. The research involves software-hardware codesign to enable ultra-low power operation under low power conditions and in special cases enable ultra-low power operation with power harvested devices. Methods used to optimize include low power hardware design, multimodality and hardware reuse.
On the systems side, we have developed solutions to optimie hardware accelerator interfacing with the systems end-to-end including optimized operation over the network.